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CSEB300: Computer Architecture

Description:Instruction set architecture; Arithmetic and Logical Unit, memory, I/O, control, and data conversion operations; Interrupts and exceptions; Datapath design; Pipelined execution; Computer Performance; Cache and DRAM memories; Buses and hard disks. Develop and debug assembly language programs and simulate specific processor components. (Prerequisite: ITBP205)
Credit Hours.:3
Text Book: D.M. Harris & S.L. Harris, Digital Design & Computer Architecture
Coordinator: Azam Beg
Topics Outline:
  1. From Zero to One [Ch 1: Sec 1.4-1.5, 1.8]
  2. Combinational Logic Design [Ch 2: Sec 2.1-2.9]
  3. Sequential Logic Design [Ch 3: Sec 3.1-3.6]
  4. Digital Building Blocks [Ch 5: Sec 5.1-5.5]
  5. Architecture [Ch 6: Sec 6.1-6.6]
  6. Microarchitecture [Ch 7: Sec 7.1-7.5]
  7. Memory Systems [Ch 8: Sec 8.1-8.5]
Outcomes:
  1. Explain how program instructions execute on a simple processor
  2. Map components of a processor/computer to system performance
  3. Design a simple processor pipeline
  4. Identify pipeline stalls due to hazards
  5. Justify the use of specific cache types in various computer systems
  6. Write MIPS assembly language programs
Mapping of Topics Outline to Outcomes
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Pre-requisiteITBP205: Digital Design and Computer Organization
Volume of the Course that Contributes to CIT Students Outcomes(SOs)
Move the mouse over the Students Outcome number to view the Students Outcome text
a b c d e f g h i j k l m n
7% 4% 11% 0% 0% 0%0% 11% 16% 9% 11% 19% 7% 0%
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